IRS2110( - 1, - 2,S)PbF/IRS2113( - 1, - 2,S)PbF
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions. Additional information is shown in Figs. 28 through 35.
Symbol
Definition
Min.
Max.
Units
V B
V S
V HO
High-side floating supply voltage
High-side floating supply offset voltage
High-side floating output voltage
(IRS2110)
(IRS2113)
-0.3
-0.3
V B - 20
V S - 0.3
520 (Note 1)
620 (Note 1)
V B + 0.3
V B + 0.3
V CC
V LO
V DD
Low-side fixed supply voltage
Low- side output voltage
Logic supply voltage
-0.3
-0.3
-0.3
20 (Note 1)
V CC + 0.3
V SS +20
V
(Note 1)
V SS
V IN
Logic supply offset voltage
Logic input voltage (HIN, LIN, & SD)
V CC - 20
V SS - 0.3
V CC + 0.3
V DD + 0.3
dV s /dt
Allowable offset supply voltage transient (Fig. 2)
50
V/ns
P D
R THJA
T J
T S
T L
Package power dissipation @ T A ≤ +25 °C
Thermal resistance, junction to ambient
Junction temperature
Storage temperature
Lead temperature (soldering, 10 seconds)
(14 lead DIP)
(16 lead SOIC)
(14 lead DIP)
(16 lead SOIC)
-55
1.6
1.25
75
100
150
150
300
W
°C/W
°C
Note 1: All supplies are fully tested at 25 V, and an internal 20 V clamp exists for each supply.
Recommended Operating Conditions
The input/output logic timing diagram is shown in Fig. 1. For proper operation, the device should be used within the
recommended conditions. The VS and VSS offset ratings are tested with all supplies biased at a 15 V differential.
Typical ratings at other bias conditions are shown in Figs. 36 and 37.
Symbol
V B
Definition
High-side floating supply absolute voltage
Min.
V S + 10
Max.
V S + 20
Units
V S
V HO
High-side floating supply offset voltage
High-side floating output voltage
(IRS2110)
(IRS2113)
Note 2
Note 2
V S
500
600
V B
V CC
V LO
V DD
Low-side fixed supply voltage
Low- side output voltage
Logic supply voltage
10
0
V SS + 3
20
V CC
V SS + 20
V
V SS
V IN
Logic supply offset voltage
Logic input voltage (HIN, LIN & SD)
-5
(Note 3)
V SS
5
V DD
T A
Ambient temperature
-40
125
°C
Note 2: Logic operational for V S of -4 V to +500 V. Logic state held for V S of -4 V to -V BS . (Refer to the Design Tip DT97-3)
Note 3: When V DD < 5 V, the minimum V SS offset is limited to -V DD.
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